A Capability That’s Never Existed Before
Europa, Jupiter’s fourth-largest moon, is the most likely place in the solar system to host extraterrestrial life.
“Europa’s surface is 10 kilometers of frozen water, and it’s believed that the core is molten,” said Ben Blalock, a professor in the Min H. Kao Department of Electrical Engineering and Computer Science (EECS). “With a molten core and frozen surface there must be water in between, right?”
Blalock specializes in making electronic components that can operate in extreme environments. His research group, the Integrated Circuits and Systems Laboratory (ICASL), previously helped the National Space and Aeronautics Administration (NASA) develop silicon-based analog chips for the Mars rovers Curiosity and Perseverance.
“It was so exciting for me and my students to be able to participate on something that got flight-qualified and eventually flew (to space),” Blalock said.
To operate on the surface of Mars, Blalock and his team had to engineer chips that could operate well from -140 to 40 degrees Celsius (-220 to 104 Fahrenheit) and under a daily bombardment of 70 radiation units (rads)—500 times the amount of radiation hitting Earth each day.
Europa’s surface, however, is possibly the most hostile environment in the solar system. The temperature commonly dips down to -180 C (-292 F), close to the freezing point of liquid nitrogen. Moreover, the moon receives a whopping 540 rads per Earth-day, a dose that would fry any standard Earth tech in under a week.
Since 2021, Blalock has been working with a team led by Georgia Tech Regents’ Professor John Cressler to create chips that can operate under these conditions. The team is part of NASA’s Concepts for Ocean Worlds Life Detection Technology (COLDTech) project, which is devoted to landing probes on Europa.
To create chips that can handle the unique operational challenges of the distant moon, Blalock’s team has integrated new materials with an old design philosophy and a groundbreaking software strategy.
New Materials and Old Gates
Complementary metal-oxide-semiconductor chips (CMOS) are ubiquitous in modern-day electronics. They are made of just one semiconductor material, and most chips—from the one in your smartphone to the 80 on each of the Curiosity and Perseverance rovers—are silicon-based.
Unfortunately, some silicon-based devices on CMOS technology have reliability concerns below -40 C. Instead, the COLDTech team switched to using heterojunction bipolar transistors (HBTs), which incorporate two semiconductor materials and are inherently immune to extreme levels of radiation. In this case, adding germanium to the chips makes them temperature-agnostic.
“Everything about the silicon-germanium (SiGe) HBT improves at cold temperatures,” said Blalock.
To further improve the chips’ performance on the frozen moon, Blalock reached back in time for an extremely fast logic gate design. Emitter-coupled logic (ECL) chips were invented in the 1950s and used in the world’s first supercomputer but fell out of favor due to their high power draw (dissipation) relative to CMOS.
“We use the ECL design philosophy but leverage the SiGe HBT to reduce the power dissipation of each ECL gate about 100-fold,” Blalock explained. “Given the SiGe HBT’s natural affinity to cold and incredibly high performance, running them at lower power still gives good enough performance for a lot of practical applications.”
Revolutionary CAD Capabilities
Having created hardware building blocks that can function on Europa, ICASL could now create a simulated version that other scientists in COLDTech could use to design the complex circuits that go into a space probe.
The only problem? ICASL was the first team in decades implementing ECL-based digital systems.
“All the modern-day computer-aided design (CAD) synthesis tools are optimized for CMOS digital design automation,” Blalock said. “To the best of my knowledge, no one has ever synthesized an ECL digital system using design automation software; they were always done manually.”
The team had to find a way to synthesize ECL systems using CMOS-based design automation software, a task which Blalock likened to tricking a bicycle-building robot into building a car.
“The tool is always going to think you’re synthesizing a CMOS circuit. It’s the only kind of format it can do,” he said. “We’re providing a capability that’s never existed before.”
Blalock hired three undergraduates to tackle the problem: electrical engineering major Zak Hamdan (MS ‘23) and two computer engineering majors, Andy Chin (MS ’24) and Von Hermoso (BS ‘25). Industry design engineer Romeo Kharileh helped Blalock supervise the team.
Hamdan designed the initial logic circuits to build an ECL-based cell library. In August 2024, Chin and Hermoso made the breakthrough that allowed the team to construct an ECL digital memory controller chip using a CAD-based synthesis flow.
“Von started chip design as a junior. We don’t even have undergraduate courses in digital design synthesis,” Blalock said. “It’s a graduate-level skill. But my COLDTech team has been comprised of undergraduate students, master’s students, and PhD students, and all of them have played a big role.”
In fact, while he certainly feels fulfilment when one of his team’s chip designs gets flight-qualified, Blalock says the student impact is one of the main reasons he has continued working with extreme condition electronics.
“In a project like this, my research students are designing for application requirements that far exceed what would be expected of them in industry,” he said. “I’ve joked with former research students that I feel like I’ve accomplished something if they’re paid a lot more money than me.”
Contact
Izzie Gall (865-974-7203, egall4@utk.edu)